NITMLOGO

NIT Meghalaya

COMPUTER SCIENCE AND ENGINEERING Department

Profile:

Dr. Kamalika Datta

Assistant Professor

Phd (Indian Institute of Engineering Science and Technology (IIEST) Shibpur)

MS (Indian Institute of Technology Kharagpur)

E-mail: kdatta@nitm.ac.in

Tel:

 

 

Research Interest

  • Memristor based logic design
  • Synthesis, optimization and testing of reversible, quantum and conventional circuits
  • Security analysis in IoT based smart systems

Educational Qualifications

  • PhD from Indian Institute of Engineering Science and Technology Shibpur in 2014
  • MS from IIT Kharagpur in 2010
  • MCA from Biju Pattanaik University of Technology in 2006
  • BSc from Ravenshaw College in 2003

Publications

International Journals:

  • A.Kole, K. Datta, I. Sengupta, A New Heuristic for N -Dimensional Nearest Neighbor Realization of a Quantum Circuit, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Vol.--, Issue No.--, Page Nos -1-12, 2017. 10.1109/TCAD.2017.2693284
  • R. Gharpinde, P.L. Thangkhiew, K. Datta, I. Sengupta, A Scalable In-Memory Logic Synthesis Approach using Memristor Crossbar, IEEE Transactions on Very Large Scale Integration Systems, Vol.--, Issue No.--, Page Nos -1-12, 2017.
  • A. Kole, K. Datta and I. Sengupta, A Heuristic for Linear Nearest Neighbor Realization of Quantum Circuits by SWAP Gate Insertion Using N-Gate Lookahead, IEEE J. Emerg. Sel. Topics Circuits Syst., Vol.-6, Issue No.-1, Page Nos -62-72, 2016.
  • K. Datta, T. Chattopadhyay, I. Sengupta, All optical design of binary adders using semiconductor optical amplifier assisted Mach-Zehnder interferometer, Microelectronics Journal, Vol.-46, Issue No.-9, Page Nos -839-847, 2015.
  • K. Datta, I. Sengupta, H. Rahaman, A Post-Synthesis Optimization Technique for Reversible Circuits Exploiting Negative Control Lines., IEEE Trans. Computers., Vol.-64, Issue No.-4, Page Nos -1208-1214, 2015.
  • K. Datta, G. Rathi, I. Sengupta, H. Rahaman, An Improved Reversible Circuit Synthesis Approach using Clustering of ESOP Cubes., JETC, Vol.-11, Issue No.-2, Page Nos -15:1-15:16, 2014.
  • K. Datta, I. Sengupta, H. Rahaman, R. Drechsler, An Approach to Reversible Logic Synthesis Using Input and Output Permutations., Trans. Computational Science., Vol.-24, Page Nos -92-110, 2014.
  • K. Datta, I. Sengupta, H. Rahaman, Particle Swarm Optimization Based Reversible Circuit Synthesis Using Mixed Control Toffoli Gates., J. Low Power Electronics, Vol.-9, Issue No.-3, Page Nos -363-372, 2013.
  • K. Datta, I. Sengupta, Partial encryption and watermarking scheme for audio files with controlled degradation of quality., Multimedia Tools Appl., Vol.-64, Issue No.-3, Page Nos -649-669, 2013.


National Journals:

  • K. Datta, G. Rathi, I. Sengupta, H. Rahaman, Exact synthesis of reversible circuits using A* algorithm, J. Inst. Eng. India Ser. B, Vol.-96, Issue No.-2, Page Nos -121-130, 2017.


International Conferences:

  • A. Kole, K. Datta, Improved NCV Gate Realization of Arbitrary Size Toffoli Gates, 30th Intl. Conf. on VLSI Design (VLSID-2017), Period -January, Place -Hyderabad, India (Accepted), Page -289-294, 2017.
  • A. Kole, P. M. Nesa Rani, K. Datta, I. Sengupta, R Drechsler, Exact Synthesis of Ternary Reversible Functions using Ternary Toffoli Gates, 47th International Symposium on Multiple-Valued Logic (ISMVL 2017), Period -22nd-24th, May, Place -Novi Sad, Serbia (Accepted)), Page -179-184, 2017.
  • P.M.N. Rani, A. Kole, K. Datta, I. Sengupta, Improved Decomposition of Multiple-Control Ternary Toffoli Gates Using Muthukrishnan-Stroud Quantum Gates, 9th International Conference on Reversible Computation, Period -5th-7th July, Place -5th-7th July, Page -202-213, 2017.
  • L. Marbaniang, A. Kole, K. Datta, I. Sengupta, Design of Efficient Quantum Circuits Using Nearest Neighbor Constraint in 2D Architecture, 9th International Conference on Reversible Computation, Period -5th-7th July, Place -5th-7th July, Page -248-253, 2017.
  • A. Kole, R. Wille, K. Datta, I. Sengupta, Test pattern generation effort evaluation of reversible circuits, 9th International Conference on Reversible Computation, Period -5th-7th July, Place -Kolkata, India, Page -162-175, 2017.
  • S. Burman, P. Rangababu, K. Datta, Development of dynamic reconfiguration implementation of AES on FPGA platform, International Conference on Devices in Integrated Circuits (DevIC)), Period -23rd-24th March, Place -Kalyani, India, Page -247-251, 2017.
  • F. Lalchhandama, B. Sapui, K. Datta, An improved approach for the synthesis of Boolean functions using memristor based IMPLY and INVERSE-IMPLY gates, IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2016), Period -July, Place -Pittsburgh, Pennsylvania, U.S.A, Page -319-324, 2016.
  • A.P.S Thengal, N. Rastogi, A. Medhi, R. Srivastava, K. Datta, Parameter Sensing and Object Tracking using Global Positioning System, 6th IEEE International Symposium on Embedded Computing and System Design, Period -15th -17th, Place -IIT Patna, Bihar, India, Page -1-5, 2016.
  • S. Burman, K. Datta, R. Wille, I. Sengupta, R. Drechsler, An Improved Gate Library for Logic Synthesis of Optical Circuits, 6th IEEE International Symposium on Embedded Computing and System Design, Period -15th - 17th, December, Place -IIT Patna, Bihar, India, Page -1-6, 2016.
  • P. L. Thangkhiew, R. Gharpinde, V.C. Paturi, K. Datta, I. Sengupta, Area Efficient Implementation of Ripple Carry Adder using Memristor Crossbar Arrays, International Design and Test Symposium (IDT), Period -18th to 20th, December, Place -Hammamet, Tunisia, Page -1-6, 2016.
  • P.M.N. Rani, A. Kole, K. Datta, A. Chakrabarty, Realization of Ternary Reversible Circuits Using Improved Gate Library, 6th International Conference On Advances In Computing & Communications (ICACC), Period -September, Place -Cochin, India, Page -153-160, 2016.
  • G. Kumar , K. Datta, Design of digital functional blocks using hybrid memristor structures, IEEE Region 10 Conference (TENCON-2015), Period -November, Place -Macao, Page -1 - 5, 2015.
  • A. Kole, K. Datta, I. Sengupta, R. Wille, Towards a Cost Metric for Nearest Neighbor Constraints in Reversible Circuits, 7th Intl. Conf. on Reversible Computation (RC-2015), Period -July, Place -Grenoble, France, Page -273-278, 2015.
  • E. Schönborn, K. Datta, R. Wille, I. Sengupta, H. Rahaman, R. Drechsler, BDD-Based Synthesis for All-Optical Mach-Zehnder Interferometer Circuits, 28th Intl. Conf. on VLSI Design (VLSID-2015), Period -January, Place -Bangalore, India, Page -435-440, 2015.
  • S. Chakraborti , P. V. Chowdhary, K. Datta, I. Sengupta, BDD based synthesis of Boolean functions using memristors, 9th Intl. Design and Test Symposium (IDT-2014), Period -December, Place -Algiers,Algeria, Page -136-141, 2014.
  • R. Wille, J. Stoppe, E. Schönborn, K. Datta, R. Drechsler, RevVis: Visualization of Structures and Properties in Reversible Circuits, 6th Intl. Conf. on Reversible Computation (RC-2014), Period -July, Place -Kyoto, Japan, Page -111-124, 2014.
  • E. Schönborn, K. Datta, R. Wille, I. Sengupta, H. Rahaman and R. Drechsler, Optimizing DD-based synthesis of reversible circuits using negative control lines, 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems(DDECS-2014), Period -April, Place -Warsaw, Poland, Page -1-6, 2014.
  • K. Datta , A. Gokhale, I. Sengupta, H. Rahaman, An ESOP-Based Reversible Circuit Synthesis Flow Using Simulated Annealing, Intl. Doctoral Symposium on Applied Computation and Security Systems (ACSS-2014), Period -April, Place -Kolkata, India, Page -131-144, 2014.
  • K. Datta, I. Sengupta, All optical reversible multiplexer design using Mach-Zehnder interferometer, 27th International Conference on VLSI Design (VLSID-2014), Period -January, Place -Mumbai, Page -539-544, 2014.
  • S.J. Roy, K. Datta, C. Bandyopadhyay, H. Rahaman, A transformation based heuristic synthesis approach for reversible circuits, Intl. Conf. on Advances in Electrical Engineering (ICAEE-2014), Period -January, Place -Vellore, India, Page -1-5, 2014.
  • K. Datta, V. Srivastav, I. Sengupta, H. Rahaman, Reversible logic implementation of AES algorithm, 8th Intl. Conf. on Design and Technology on Integrated Systems (DTIS-2013), Period -March, Place -Abu Dhabi, UAE, Page -140-144, 2013.
  • K. Datta, G. Rathi, I. Sengupta, H. Rahaman, An improved reversible circuit synthesis approach using clustering of ESOP cubes, Reed Muller Workshop, (RM-2013), Period -May, Place -Toyoma, Japan, 2013.
  • K. Datta, G. Rathi, R. Wille, I. Sengupta, H. Rahaman, R. Drechsler, Exploiting negative control lines in the optimization of reversible circuits, 5th Intl. Conf. on Reversible Computing (RC-2013), Period -July, Place -Victoria, Canada, Page -209-220, 2013.
  • K. Datta, B. Ghuku, D. Sandeep, I. Sengupta, H. Rahaman, A cycle based reversible logic synthesis approach, 3rd Intl. Conf. on Advances in Computing and Communications (ACC-2013), Period -August, Place -Kochi, Page -316-319, 2013.
  • K. Datta, I. Sengupta, H. Rahaman, R. Drechsler, An evolutionary approach to reversible logic synthesis using output permutation, 8th Intl. Design and Test Symposium (IDT-2013), Period -December, Place -Marrakesh, Morocco, Page -1-6, 2013.
  • C. Bandyopadhyay, D. Roy, D.K. Kole, K. Datta, H. Rahaman, ESOP-based synthesis of reversible circuits using improved cube list, 4th Intl. Symp. on Electronic System Design (ISED-2013), Period -December, Place -Singapore, 2013.
  • K. Datta, G. Rathi, I. Sengupta, H. Rahaman, Synthesis of reversible circuits using heuristic search method, 25th Intl. Conf. on VLSI Design (VLSID-2012), Period -January, Place -Hyderabad, India, Page -328-333, 2012.
  • K. Datta, I. Sengupta, H. Rahaman, Particle swarm optimization based circuit synthesis of reversible logic, 3rd Intl. Symp. on Electronic System Design (ISED-2012), Period -December, Place -Shibpur, India, Page -226-230, 2012.
  • K. Datta, I. Sengupta, H. Rahaman, Group theory based reversible logic synthesis, 5th Intl. Conf. on Computers and Devices for Communication (CODEC-2012), Period -December, Place -Kolkata, India, 2012.
  • K. Datta, I. Sengupta, H. Rahaman, Reversible circuit synthesis using evolutionary algorithm, 5th Intl. Conf. on Computers and Devices for Communication (CODEC-2012), Period -December, Place -Kolkata, India, 2012.
  • K. Datta, I. Sengupta, Improving bitrate in detail coefficient based audio watermarking using wavelet transformation, IEEE Intl. Conf. on Communication and Signal Processing (ICCSP-2011), Period -February, Place -Calicut, India, Page -160-164, 2011.
  • N. Baranwal and K. Datta, Comparative study of spread spectrum based audio watermarking techniques, IEEE Intl. Conf. on Recent Trends in Information Technology (ICRTIT-2011), Period -June, Place -Chennai, India, Page -157-166, 2011.
  • M. Dasmohapatra, K. Datta, I. Sengupta, A preventive measure to protect from denial of service attack, 4th Intl. Conf. on Network Security and Application (CNSA-2011), Period -July, Place -Chennai, India, Page -896-900, 2011.
  • K. Datta, I. Sengupta, A redundant audio watermarking technique using discrete wavelet transformation, IEEE Intl. Conf. on Communication Software and Networks (ICCSN-2010), Period -February, Place -Singapore, Page -27-31, 2010.
  • N. Shenoy, K. Datta, I. Sengupta, Network analysis using firewall, Intl. Conf. on Computing (ICC-2010), Period -December, Place -Delhi, India, 2010.
  • K. Datta, I. Sengupta, A robust encrypted audio watermarking scheme using discrete wavelet transformation, 13th World Multi Conference on Systemics, Cybernetics and Informatics (WMSCI-2009), Period -July, Place -Orlando, USA, 2009.
  • I. Datta, K. Datta and I. Sengupta, EXE watermarking by exploring the binary format for executable in Windows and Unix, Indo-US Conf. and Workshop on Cyber Security, Cyber Crime, and Cyber Forensics, Amrita Institute of Medical Sciences and Research Centre (AIMS), Period -August, Place -Kochi, India, 2009.
  • K. Datta, S. Gupta, I. Sengupta, Digital audio watermarking techniques using discrete wavelet transformation, Intl. Conf. on Electronics, Computers and Communication (ICECC-2008), Period -June, Place -Rajshahi, Bangladesh, 2008.


National Conferences:

  • K. Datta, I. Sengupta, A robust non-blind audio watermarking scheme based on discrete wavelet transform, National Workshop on Network Security (NWNS-2013), Period -March, Place -Tezpur, India, 2013.



Courses Taught

Previous/Other Semester/Year
  • Computer Organization & Architecture, Autumn Semester, 2014
  • Advanced Operating System, Autumn Semester, 2014
  • Computer Organization & Architecture, Spring Semester, 2015
  • Embedded Systems, Spring Semester, 2015
  • Microprocessor & Interfacing, Autumn Semester, 2015
  • Advanced Operating System, Autumn Semester, 2015
  • Computer Organization & Architecture, Spring Semester, 2016
  • Embedded Systems, Spring Semester, 2016
  • Microprocessor & Interfacing, Autumn Semester, 2016
  • Advanced Operating System, Autumn Semester, 2016
Current/Present Semester/Year
  • Computer Organization & Architecture, Spring Semester, 2017
    • Embedded Systems, Spring Semester, 2017
      • Microprocessor & Interfacing, Autumn Semester, 2017
        • Advanced Operating System, Autumn Semester, 2017

          Students Supervised/Supervising

          • Ph.D
          • Phrangboklang Lynton Thangkhiew, Ph.D, Characterization and scalable synthesis of logic functions using memristors, 2015-present
          • P. Mercy Rani, Ph.D, Synthesis and Optimization of Ternary Reversible Circuits, 2015-present
          • Leniency Marbaniang, Ph.D, Efficient placement of quantum cicuits using nearest neighbor constraints, 2017-present
          • M.Tech
          • Rituranjan Srivastwa, M.Tech, Optimization of qubit placement and synthesis in multi-dimensional architectures using nearest neighbor realization, 2015-2016
          • F. Lalchhandama, M.Tech, Development of CAD tool for the synthesis of Boolean functions using memristors, 2015-2016
          • Rahul Gharpinde, M.Tech, Development of algorithms for memristor based scalable synthesis of digital functions, 2016-2017
          • Shuchishman Burman, M.Tech, Dynamic reconfiguration of AES algorithm on FPGA platform, 2015-2016
          • Gaurav Kumar, M.Tech, Memristor based logic design using hybrid structures and threshold gate, 2015-2016
          • Brojogopal Sapui, M.Tech, Logic design with memristive devices, 2015-2016
          • Manas Das Mohapatra, M.Tech, Study and analysis of some network based attacks, 2010-2011
          • Neha Baranwal, M.Tech, Audio watermarking using spread spectrum technique, 2010-2011
          • Sunanda Kumari, M.Tech, Study and analysis of audio watermarking techniques, 2010-2011
          • B.Tech
          • Nitamoni Das and Aman Kumar Jain, B.Tech, Activity recognition using accelerometer, 2015-2016 (1 Year)
          • Naman Rastogi and Abhilash Medhi, B.Tech, Object Tracking and Parameter Sensing using GPS, 2015-2016 (1 Year)
          • Prem Prabhat, B.Tech, An intelligent low-cost reliable integrated home automation system, 2016-2017(1 year)
          • A.P.S. Thengal and P. Hangsing, B.Tech, Design of smart irrigation system, 2016-2017(1 year)

          Projects

          Sl No. Title of Project PI CO-PI Funding Agency Sanctioned Amount StartYr - EndYr (Duration) Status Project Type
          1 Investigation of Dynamic Reconfigurable Issues in Cryptographic Algorithm Implementation on FPGA Platform Dr. Kamalika Datta Dr. P. Rangababu and Dr. Anup Dandapat DeitY 15 Lakhs 2016-2017 (1 Year 3 months) Completed Sponsored
          2 Efficient Multi-dimensional Qubit Placement in Quantum Circuits Dr. Kamalika Datta None DST 14.82 Lakhs 2016-2019 (3 Years) Ongoing Sponsored
          3 Development of CAD Tools for Synthesis, Optimization and Verification of Digital Circuits using Memristors (Indo-Austria) Dr. Kamalika Datta/Prof. Robert Wille None DST 8.65 Lakhs 2017-2019 Ongoing Sponsored
          4 Development of Solid State Transformer based Efficient Power Conditioning Unit for Photovoltaic System for Hybrid AC/DC Microgrid Applications (Indo-Mexico) Dr. Asim Datta Dr. Kamalika Datta DST 9.78 Lakhs 2017-2020 (3 years) Ongoing Sponsored

          Work Experience

          • Assistant Professor, Department of Computer Science & Engineering, NIT Meghalaya, Shillong
            Duration: July 2014 - till date
          • Assistant Professor, School of Computer Engineering, KIIT University, Orissa
            Duration: July 2010 - July 2011
          • Research Consultant, School of Information Technology, IIT Kharagpur
            Duration: January 2010 - June 2010
            Name of Project: "Fault Diagnosis to Enhance Yield", sponsored by Synopsys Pvt. Ltd., USA
          • Junior Project Assistant, School of Information Technology, IIT Kharagpur
            Duration: August 2007 - December 2009
            Name of Project: "Development of Infrastructure for Centre of Excellence in Information Assurance", sponsored by HQIDS, Ministry of Defence, Government of India
          • Software Engineer, Mindfire Solutions Pvt. Ltd., Bhubaneswar Duration: June 2006 - July 2007

          Committee

          Sl No. Committee Name Contribution Description Duration
          1 Institute Information committee Member Secretary Publicize the significant happenings at NIT Meghalaya and prepare documents for media release June 2017 till date
          2 National Service Scheme (NSS) Committee Member Arranging and organizing NSS activities in Shillong and around September 2015 till date
          3 Student Disciplinary Committee Member Handle student diciplinary activities on a case by case basis and recommend suitable action November 2015 till date
          4 International Cooperation Committee Convenor Maintaining and exploring international oppurtunities October 2015 till October 2016
          5 Website Maintenance Committee Member Designing and updating the website of the institute January 2016 till january 2017

          Conference/Symposium/Workshop/Seminar Organised

          Workshop:

          Sl No. Title Sponsors National/International Duration Role Played
          1 Workshop on Research Challenges in Reversible and Quantum Computing DST and NIT Meghalaya International 19-20 March, 2015 Organizer
          4 Logic Design of Quantum Circuits and Memristor -based Systems GIAN, MHRD International 8th to 12th August, 2016 Course-Coordinator
          5 Workshop on creation and promotion of online teaching resources NIT Meghalaya and IIT Kharagpur National 5th June, 2017 Co-ordinator



          Short Term Course:

          Sl No. Title Sponsors National/International Duration Role Played
          1 Logic Design of Quantum Circuits and Memristor -based Systems GIAN, MHRD International 8th to 12th August, 2016 Course-Coordinator
          1 NPTEL MOOC on Computer Architecture and Organization MHRD National July-October 2017 Faculty coordinator


          Conference/Workshop/Seminar Attended

          Conference:

          Sl No. Name Period Place National|International
          1 International Conference on VLSI Design 7th-11th January, 2017 Hyderabad, India International
          2 9th International Conference on Reversible Computation, 2017 5th-7th July, 2017 Kolkata, India International
          3 IEEE Computer Society Annual Sumposium on VLSI (ISVLSI)) 11th-13th July, 2016 Pittsburgh, Pennsylvania International
          4 International Conference on VLSI Design 4th -7th January, 2015 Bangalore, India International
          5 Design Automation and Test in Europe 8th - 10th March, 2015 Grenoble, France International



          Professional Membership

          Sl No. Name Member ID Category Validity
          1 IEEE 90698501 Member Till November 2017

          Awards & Recognition

          Sl No. Award Details Year
          1 Member of DST-DAAD bilateral research exchange programme with University of Bremen. 2013
          2 Selected in the prestigious Heidelberg Laureate Forum held in Heidelberg, Germany in September, 2014. A number of Turing Award Recipients and other experts in the field of computer science and mathematics participated in the forum 2014

          Invited Talks

          Sl No. Title Event Invited Talks/Tutorial Co-Speakers
          1 Reversible and Quantum Circuits- Synthesis, optimization and implementation VDAT 2016, IIT Guwahati, India Tutorial Prof. Indranil Sengupta and Dr. Amlan Chakrabarty
          2 Reversible Circuits – Design Methods for an Emerging Technology VDAT 2014, Coimbator, India Tutorial Prof. Indranil Sengupta, Dr. Robert Wille, Prof. Hafizur Rahaman
          3 Synthesis and Optimization of Reversible Logic Circuits Workshop on Emerging and Post-CMOS Technologies 2014, IIEST, Shibpur Invited Talk None
          4 Applications of Reversible Logic in Cryptography and Coding Theory VLSI Design, 2013, Pune, India Embedded Tutorial Prof. Indranil Sengupta
          5 Digital Watermarking Scheme for Copyright Protection International Conference on Computational Intelligence and Communication Networks (CICN-2011) Invited Talk None
          6 Reversible Logic: An emerging Technology Workshop on Network Security (NWNS-2013), Tezpur University, Tezpur, India Invited Talk None
          7 IoT Systems: Challenges and security issues International conference on Advanced Computing, 2016, MAKAUT, WB Invited Talk None
          8 Memristors: Technology, Circuit Models and Applications 30th international conference on vlsi design (VLSID 2017) Tutorial Talk Prof. Indranil Sengupta

          © 2014 NIT Meghalaya, Laitumkhrah, Shillong-793003, Meghalaya, India